The present invention relates to a data receiver.
European Patent Specification Publication No. 0 098 649, to which U.S. Pat. No. 4,570,125 corresponds, discloses a coherent data demodulator for digital signals wherein correction signals for clock and carrier oscillators are derived by comparing the times of the zero crossings at the outputs of two orthogonal channels with the nominal times at which these crossings should occur. In the case of correcting the phase of the carrier signals, a correction signal is fed back to the local oscillator so that its frequency is adjusted in the desired manner. Although the demodulator disclosed in EP Specification No. 0 098 649 and corresponding U.S. Pat. No. 4,570,125 operates satisfactorily, it does not have a limitation which is concerned with the rate at which the carrier phase can be adjusted. The carrier control loop includes quadrature mixers and low pass filters which have an inherent filter delay. If the carrier phase is adjusted quickly compared to the filter delay then the carrier control loop will go unstable. In some applications it is important for the receiver to have fast acquisition.